+ Lockup-Free Cache

Time

Memory Latency

Dependent Instruction

Data Arrives

L1 Miss Time

Memory Reference (miss)

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With a lookup-free cache, the cache miss itself does not stall execution. Instead the processor continues the execution until it encounters an instruction that depends on the data being loaded. The memory latency can therefore be tolerated for some time, which reduces the stall time as indicated by the red line.